Journal Search Engine
The Journal of The Korea Institute of Intelligent Transport Systems Vol.7 No.3 pp.95-99
저 전력 설계 자동화를 위한 최소 자원 상위 레벨 합성 알고리즘
A Minimal Resource High-Level Synthesis Algorithm for Low Power Design Automation
Abstract
This paper proposes a new minimal resource high-level synthesis algorithm for low power design automation. The proposed algorithm executes an efficient approach to minimize the power consumption of the functional units in a circuit during the high level synthesis. In this paper, we visit all control steps one by one to reduce the switching activity in CDFG. The register sharing algorithm determines the minimum register after the life time analysis of all variable. According to property of input signal for functional unit, the proposed method visits all control step one by one and determines the resource allocation with minimal power consumption at each control step in a greedy fashion. The effect of the proposed algorithm has been proved through various filter benchmark to adopt a new scheduling and allocation algorithm considering the low rover.
